ETRAX 100LX	ETRAX 100LX MCM4+16	ETRAX FS
Package	256 pin PBGA	256 pin PBGA	256 pin PBGA
Size	27x27 mm	27x27 mm	27x27 mm
CPU	100 MIPS 32-bit RISC	100 MIPS 32-bit RISC	200 MIPS 32-bit RISC
Cache memory	8 kB on-chip	8 kB on-chip	2x16 kB on-chip
Internal RAM	-	16 MB	128 kB
Internal Flash	-	4 MB	-
Memory Management Unit (MMU)	4 GB / user process	4 GB / user process	4 GB / user process
Ethernet controller	Single 10/100 Mbit/s	Single 10/100 Mbit/s	Dual 10/100 Mbit/s
Direct Memory Access (DMA)	10 DMA channels w. 64 byte FIFO	10 DMA channels w. 64 byte FIFO	10 DMA channels w. 64 byte FIFO
	200 MB/s total peak	200 MB/s total peak	1.6 GB/s total peak
Serial interfaces
- Asynchronous ports	4	4	4
- Synchronous ports	2	2	2
USB interfaces	2 USB 1.1 ports	2 USB 1.1 ports	See I/O processor
ATA interfaces	4 EIDE/ATA-2 ports	4 EIDE/ATA-2 ports	4 EIDE/ATA-2 ports
SCSI interfaces	2x8-bit wide or 1x16-bit wide	2x8-bit wide or 1x16-bit wide	See I/O processor
Parallel interfaces	2 Parallel ports	2 Parallel ports	See I/O processor
I/O processor	-	-	Serial 1
Capable of microcode-based implementations of various I/O protocols. Some examples are listed here.			Parallel 1
			PC Card/ Cardbus/PCI
			USB 1.1 Host
			USB 2.0 FS/HS host and device 1
			ATA/EIDE 1
			SCSI 1
Bus interfaces & memory controllers	SDRAM	SDRAM	SDRAM
	EDO DRAM	SRAM	SRAM
	SRAM	EPROM	EPROM
	EPROM	NOR FlashPROM	NOR FlashPROM
	NOR FlashPROM		NAND FlashPROM
On-Chip Debug	-	-	In circuit debug with JTAG
Hardware accelerated encryption	-	-	AES, DES, 3DES, SHA-1, MD-5 and IP checksum

1) The I/O protocol is not yet implemented.